Packaged Chip Image
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Rik,rjlittlefield wrote:Excellent, excellent! The lighting is spot on. I'm not sure I've ever seen a chip in quite this pristine condition. You guys make these things, then?
--Rik
We design and layout these chips and have them fabricated by a silicon "foundry", IBM in this case. The design is quite involved and the layout affects chip performance, so it's an irradiative process that takes months and years to complete. The fab takes 3-6 months and involves very complex steps with between 30 and 60 optical masks that are used for exposure. The optical masks are operated well below diffraction limit wavelengths. They are pre distorted to produce the desired final result (working backwards) and require massive supercomputers to calculate the mask details. Sometimes multiple masks are required to yield the desired result. The packaged chip is from a new IBM process called Silicon Germanium BiCMOS 9HP, the bare chip is from an IBM process called Silicon Germanium BiCMOS 8WL. The 9HP process has feature sizes of 90nm, while 8WL is 130nm.
Wish I could show a new chip, the solder balls are bright and not dented. These images are much better than the bare chip shown, but I can't show because of proprietary nature. The bright spherical solder ball mirrors (they weren't oxidized like the image posted) were a challenge indeed!!!